ObjFW  Check-in [cc826fdb6d]

Overview
Comment:Fix workaround for missing blx on ARM
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SHA3-256: cc826fdb6d114548aa4b86e9a09167829d918f1d9edd29339cac74afc2e21ec4
User & Date: js on 2024-05-22 19:24:08
Other Links: branch diff | manifest | tags
Context
2024-05-22
19:25
configure: Add -no-integrated-as to MIPS ASFLAGS check-in: 1277ea5ce5 user: js tags: 1.1
19:24
Fix workaround for missing blx on ARM check-in: cc826fdb6d user: js tags: 1.1
2024-05-13
21:08
Fix workaround for missing blx on ARM check-in: e933229b5a user: js tags: trunk
2024-05-12
15:48
ofarc: Fix extracting from stdin on macOS check-in: d207384006 user: js tags: 1.1
Changes
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Modified src/forwarding/forwarding-arm-elf.S from [0367f22137] to [f6b2ed20ca].

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	mov	r12, r0
	ldr	r0, [sp, #0]
	mov	r1, r4
	ldr	r2, [sp, #4]
#ifdef HAVE_BLX
	blx	r12
#else

	bl	r12
#endif

	cmp	r0, #0
	beq	0f
	ldr	r1, [sp, #0]
	cmp	r0, r1
	beq	0f








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	mov	r12, r0
	ldr	r0, [sp, #0]
	mov	r1, r4
	ldr	r2, [sp, #4]
#ifdef HAVE_BLX
	blx	r12
#else
	mov	lr, pc
	bx	r12
#endif

	cmp	r0, #0
	beq	0f
	ldr	r1, [sp, #0]
	cmp	r0, r1
	beq	0f
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	mov	r12, r0
	ldr	r0, [sp, #4]
	mov	r1, r4
	ldr	r2, [sp, #8]
#ifdef HAVE_BLX
	blx	r12
#else

	bl	r12
#endif

	cmp	r0, #0
	beq	0f
	ldr	r1, [sp, #4]
	cmp	r0, r1
	beq	0f








>
|








115
116
117
118
119
120
121
122
123
124
125
126
127
128
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	mov	r12, r0
	ldr	r0, [sp, #4]
	mov	r1, r4
	ldr	r2, [sp, #8]
#ifdef HAVE_BLX
	blx	r12
#else
	mov	lr, pc
	bx	r12
#endif

	cmp	r0, #0
	beq	0f
	ldr	r1, [sp, #4]
	cmp	r0, r1
	beq	0f
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