ObjFW  Check-in [9feaa90358]

Overview
Comment:of_memory_barrier(): Only use mfence on x86_64

This is only available on x86 with SSE2, while it's always available on
x86_64. However, checking if SSE2 is available here would be too slow,
therefore let the compiler decide what do do instead (which will depend
on the selected target CPU).

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SHA3-256: 9feaa90358c58d02cc31bb50d7b51e099eb5e9a53d6416efaa51415884a1c9e1
User & Date: js on 2016-07-30 21:46:24
Other Links: manifest | tags
Context
2016-07-30
23:29
atomic.h: Use the OSAtomic variant without barrier check-in: 0c3e3da576 user: js tags: trunk
21:46
of_memory_barrier(): Only use mfence on x86_64 check-in: 9feaa90358 user: js tags: trunk
21:22
of_spinlock_(un)lock: Add memory barrier check-in: 8e7c6ddf8c user: js tags: trunk
Changes

Modified src/atomic.h from [c6a5af4a20] to [23c4a049f4].

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}

static OF_INLINE void
of_memory_barrier(void)
{
#if !defined(OF_HAVE_THREADS)
	/* nop */
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
	__asm__ __volatile__ (
	    "mfence" ::: "memory"
	);
#elif defined(OF_POWERPC_ASM)
	__asm__ __volatile__ (
	    "sync" ::: "memory"
	);







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}

static OF_INLINE void
of_memory_barrier(void)
{
#if !defined(OF_HAVE_THREADS)
	/* nop */
#elif defined(OF_X86_64_ASM)
	__asm__ __volatile__ (
	    "mfence" ::: "memory"
	);
#elif defined(OF_POWERPC_ASM)
	__asm__ __volatile__ (
	    "sync" ::: "memory"
	);