Overview
| Comment: | OFSystemInfo: Work around GCC picking ebx for "=r"
Newer GCC versions on Windows use ebx for "=r", which results in a |
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| Downloads: | Tarball | ZIP archive | SQL archive |
| Timelines: | family | ancestors | descendants | both | trunk |
| Files: | files | file ages | folders |
| SHA3-256: |
2fc10166319846f8cba5ee7a6fc5da6d |
| User & Date: | js on 2018-12-02 20:11:04 |
| Other Links: | manifest | tags |
Context
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2018-12-07
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| 01:33 | OFStream: Use a delegate for async operations check-in: d16ad96cbd user: js tags: trunk | |
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2018-12-02
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| 20:11 | OFSystemInfo: Work around GCC picking ebx for "=r" check-in: 2fc1016631 user: js tags: trunk | |
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2018-12-01
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| 21:32 | ofarc: Fix a typo check-in: e62556c4a5 user: js tags: trunk | |
Changes
Modified src/OFSystemInfo.m from [b0d88583f9] to [f32302ffd0].
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244 245 246 247 248 249 250 | __asm__ ( "cpuid" : "=a"(regs.eax), "=b"(regs.ebx), "=c"(regs.ecx), "=d"(regs.edx) : "a"(eax), "c"(ecx) ); # elif defined(OF_X86_ASM) /* | | | | | | < | | | 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 | __asm__ ( "cpuid" : "=a"(regs.eax), "=b"(regs.ebx), "=c"(regs.ecx), "=d"(regs.edx) : "a"(eax), "c"(ecx) ); # elif defined(OF_X86_ASM) /* * This workaround is required by older GCC versions when using -fPIC, * as ebx is a special register in PIC code. Yes, GCC is indeed not * able to just push a register onto the stack before the __asm__ block * and to pop it afterwards. */ __asm__ ( "xchgl %%ebx, %%edi\n\t" "cpuid\n\t" "xchgl %%edi, %%ebx" : "=a"(regs.eax), "=D"(regs.ebx), "=c"(regs.ecx), "=d"(regs.edx) : "a"(eax), "c"(ecx) ); # else memset(®s, 0, sizeof(regs)); # endif return regs; |
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