Index: src/atomic.h
==================================================================
--- src/atomic.h
+++ src/atomic.h
@@ -416,11 +416,11 @@
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
-		    : "eax"
+		    : "eax", "cc"
 		);
 # ifdef OF_AMD64_ASM
 	if (sizeof(int) == 8)
 		__asm__ (
 		    "0:\n\t"
@@ -430,11 +430,11 @@
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
-		    : "rax"
+		    : "rax", "cc"
 		);
 # endif
 	else
 		abort();
 
@@ -469,11 +469,11 @@
 	    "lock\n\t"
 	    "cmpxchg	%0, %2\n\t"
 	    "jne	0\n\t"
 	    : "=&r"(i)
 	    : "r"(i), "m"(*p)
-	    : "eax"
+	    : "eax", "cc"
 	);
 
 	return i;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
 	return __sync_or_and_fetch(p, i);
@@ -499,11 +499,11 @@
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
-		    : "eax"
+		    : "eax", "cc"
 		);
 # ifdef OF_AMD64_ASM
 	if (sizeof(int) == 8)
 		__asm__ (
 		    "0:\n\t"
@@ -513,11 +513,11 @@
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
-		    : "rax"
+		    : "rax", "cc"
 		);
 # endif
 	else
 		abort();
 
@@ -552,11 +552,11 @@
 	    "lock\n\t"
 	    "cmpxchg	%0, %2\n\t"
 	    "jne	0\n\t"
 	    : "=&r"(i)
 	    : "r"(i), "m"(*p)
-	    : "eax"
+	    : "eax", "cc"
 	);
 
 	return i;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
 	return __sync_and_and_fetch(p, i);
@@ -582,11 +582,11 @@
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
-		    : "eax"
+		    : "eax", "cc"
 		);
 # ifdef OF_AMD64_ASM
 	if (sizeof(int) == 8)
 		__asm__ (
 		    "0:\n\t"
@@ -596,11 +596,11 @@
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
-		    : "rax"
+		    : "rax", "cc"
 		);
 # endif
 	else
 		abort();
 
@@ -635,11 +635,11 @@
 	    "lock\n\t"
 	    "cmpxchgl	%0, %2\n\t"
 	    "jne	0\n\t"
 	    : "=&r"(i)
 	    : "r"(i), "m"(*p)
-	    : "eax"
+	    : "eax", "cc"
 	);
 
 	return i;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
 	return __sync_xor_and_fetch(p, i);
@@ -659,20 +659,21 @@
 		return YES;
 	}
 
 	return NO;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
-	int32_t r;
+	int r;
 
 	__asm__ (
 	    "xorl	%0, %0\n\t"
 	    "lock\n\t"
 	    "cmpxchg	%2, %3\n\t"
 	    "sete	%b0\n\t"
 	    "movzbl	%b0, %0"
 	    : "=&d"(r)	/* use d instead of r due to gcc bug */
 	    : "a"(o), "r"(n), "m"(*p)
+	    : "cc"
 	);
 
 	return r;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
 	return __sync_bool_compare_and_swap(p, o, n);
@@ -702,10 +703,11 @@
 	    "cmpxchg	%2, %3\n\t"
 	    "sete	%b0\n\t"
 	    "movzbl	%b0, %0"
 	    : "=&d"(r)	/* use d instead of r due to gcc bug */
 	    : "a"(o), "r"(n), "m"(*p)
+	    : "cc"
 	);
 
 	return r;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
 	return __sync_bool_compare_and_swap(p, o, n);
@@ -735,10 +737,11 @@
 	    "cmpxchg	%2, %3\n\t"
 	    "sete	%b0\n\t"
 	    "movzbl	%b0, %0"
 	    : "=&d"(r)	/* use d instead of r due to gcc bug */
 	    : "a"(o), "r"(n), "m"(*p)
+	    : "cc"
 	);
 
 	return r;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
 	return __sync_bool_compare_and_swap(p, o, n);