Index: configure.ac ================================================================== --- configure.ac +++ configure.ac @@ -583,37 +583,38 @@ ]) ]) atomic_ops="none" - AC_MSG_CHECKING(whether we have an atomic ops assembly implementation) - AC_EGREP_CPP(yes, [ - #if defined(__GNUC__) && (defined(__i386__) || \ - defined(__x86_64__) || defined(__amd64__)) - yes - #endif - ], [ - AC_MSG_RESULT(yes) - atomic_ops="assembly implementation" - ], [ - AC_MSG_RESULT(no) - ]) - AC_MSG_CHECKING(whether __sync_* works) AC_TRY_LINK([#include ], [ int32_t i, j; if (__sync_add_and_fetch(&i, 1)) j = __sync_sub_and_fetch(&i, 1); while (!__sync_bool_compare_and_swap(&i, 0, 1)); ], [ AC_MSG_RESULT(yes) - test x"$atomic_ops" = x"none" && atomic_ops="gcc builtins" + atomic_ops="gcc builtins" AC_DEFINE(OF_HAVE_GCC_ATOMIC_OPS, 1, [Whether gcc atomic operations are available]) ], [ AC_MSG_RESULT(no) ]) + + AC_MSG_CHECKING(whether we have an atomic ops assembly implementation) + AC_EGREP_CPP(yes, [ + #if defined(__GNUC__) && (defined(__i386__) || \ + defined(__x86_64__) || defined(__amd64__)) + yes + #endif + ], [ + AC_MSG_RESULT(yes) + test x"$atomic_ops" = x"none" && \ + atomic_ops="assembly implementation" + ], [ + AC_MSG_RESULT(no) + ]) AC_CHECK_HEADER(libkern/OSAtomic.h, [ test x"$atomic_ops" = x"none" && atomic_ops="libkern/OSAtomic.h" AC_DEFINE(OF_HAVE_OSATOMIC, 1, [Whether we have libkern/OSAtomic.h]) Index: src/atomic.h ================================================================== --- src/atomic.h +++ src/atomic.h @@ -31,10 +31,12 @@ static OF_INLINE int of_atomic_int_add(volatile int *p, int i) { #if !defined(OF_HAVE_THREADS) return (*p += i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_add_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) if (sizeof(int) == 4) __asm__ __volatile__ ( "lock\n\t" "xaddl %0, %2\n\t" @@ -54,12 +56,10 @@ # endif else abort(); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_add_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicAdd32Barrier(i, p); #else # error of_atomic_int_add not implemented! #endif @@ -68,10 +68,12 @@ static OF_INLINE int32_t of_atomic_int32_add(volatile int32_t *p, int32_t i) { #if !defined(OF_HAVE_THREADS) return (*p += i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_add_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) __asm__ __volatile__ ( "lock\n\t" "xaddl %0, %2\n\t" "addl %1, %0" @@ -78,12 +80,10 @@ : "+&r"(i) : "r"(i), "m"(*p) ); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_add_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicAdd32Barrier(i, p); #else # error of_atomic_int32_add not implemented! #endif @@ -92,10 +92,12 @@ static OF_INLINE void* of_atomic_ptr_add(void* volatile *p, intptr_t i) { #if !defined(OF_HAVE_THREADS) return (*(char* volatile*)p += i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_add_and_fetch(p, (void*)i); #elif defined(OF_X86_64_ASM) __asm__ __volatile__ ( "lock\n\t" "xaddq %0, %2\n\t" "addq %1, %0" @@ -112,12 +114,10 @@ : "+&r"(i) : "r"(i), "m"(*p) ); return (void*)i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_add_and_fetch(p, (void*)i); #elif defined(OF_HAVE_OSATOMIC) # ifdef __LP64__ return (void*)OSAtomicAdd64Barrier(i, (int64_t*)p); # else return (void*)OSAtomicAdd32Barrier(i, (int32_t*)p); @@ -130,10 +130,12 @@ static OF_INLINE int of_atomic_int_sub(volatile int *p, int i) { #if !defined(OF_HAVE_THREADS) return (*p -= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_sub_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) if (sizeof(int) == 4) __asm__ __volatile__ ( "negl %0\n\t" "lock\n\t" @@ -155,12 +157,10 @@ # endif else abort(); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_sub_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicAdd32Barrier(-i, p); #else # error of_atomic_int_sub not implemented! #endif @@ -169,10 +169,12 @@ static OF_INLINE int32_t of_atomic_int32_sub(volatile int32_t *p, int32_t i) { #if !defined(OF_HAVE_THREADS) return (*p -= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_sub_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) __asm__ __volatile__ ( "negl %0\n\t" "lock\n\t" "xaddl %0, %2\n\t" @@ -180,12 +182,10 @@ : "+&r"(i) : "r"(i), "m"(*p) ); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_sub_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicAdd32Barrier(-i, p); #else # error of_atomic_int32_sub not implemented! #endif @@ -194,10 +194,12 @@ static OF_INLINE void* of_atomic_ptr_sub(void* volatile *p, intptr_t i) { #if !defined(OF_HAVE_THREADS) return (*(char* volatile*)p -= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_sub_and_fetch(p, (void*)i); #elif defined(OF_X86_64_ASM) __asm__ __volatile__ ( "negq %0\n\t" "lock\n\t" "xaddq %0, %2\n\t" @@ -216,12 +218,10 @@ : "+&r"(i) : "r"(i), "m"(*p) ); return (void*)i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_sub_and_fetch(p, (void*)i); #elif defined(OF_HAVE_OSATOMIC) # ifdef __LP64__ return (void*)OSAtomicAdd64Barrier(-i, (int64_t*)p); # else return (void*)OSAtomicAdd32Barrier(-i, (int32_t*)p); @@ -234,10 +234,12 @@ static OF_INLINE int of_atomic_int_inc(volatile int *p) { #if !defined(OF_HAVE_THREADS) return ++*p; +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_add_and_fetch(p, 1); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) int i; if (sizeof(int) == 4) __asm__ __volatile__ ( @@ -263,12 +265,10 @@ # endif else abort(); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_add_and_fetch(p, 1); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicIncrement32Barrier(p); #else # error of_atomic_int_inc not implemented! #endif @@ -277,10 +277,12 @@ static OF_INLINE int32_t of_atomic_int32_inc(volatile int32_t *p) { #if !defined(OF_HAVE_THREADS) return ++*p; +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_add_and_fetch(p, 1); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) uint32_t i; __asm__ __volatile__ ( "xorl %0, %0\n\t" @@ -291,12 +293,10 @@ : "=&r"(i) : "m"(*p) ); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_add_and_fetch(p, 1); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicIncrement32Barrier(p); #else # error of_atomic_int32_inc not implemented! #endif @@ -305,10 +305,12 @@ static OF_INLINE int of_atomic_int_dec(volatile int *p) { #if !defined(OF_HAVE_THREADS) return --*p; +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_sub_and_fetch(p, 1); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) int i; if (sizeof(int) == 4) __asm__ __volatile__ ( @@ -334,12 +336,10 @@ # endif else abort(); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_sub_and_fetch(p, 1); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicDecrement32Barrier(p); #else # error of_atomic_int_dec not implemented! #endif @@ -348,10 +348,12 @@ static OF_INLINE int32_t of_atomic_int32_dec(volatile int32_t *p) { #if !defined(OF_HAVE_THREADS) return --*p; +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_sub_and_fetch(p, 1); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) uint32_t i; __asm__ __volatile__ ( "xorl %0, %0\n\t" @@ -362,12 +364,10 @@ : "=&r"(i) : "m"(*p) ); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_sub_and_fetch(p, 1); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicDecrement32Barrier(p); #else # error of_atomic_int32_dec not implemented! #endif @@ -376,10 +376,12 @@ static OF_INLINE unsigned int of_atomic_int_or(volatile unsigned int *p, unsigned int i) { #if !defined(OF_HAVE_THREADS) return (*p |= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_or_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) if (sizeof(int) == 4) __asm__ __volatile__ ( "0:\n\t" "movl %2, %0\n\t" @@ -409,12 +411,10 @@ # endif else abort(); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_or_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicOr32Barrier(i, p); #else # error of_atomic_int_or not implemented! #endif @@ -423,10 +423,12 @@ static OF_INLINE uint32_t of_atomic_int32_or(volatile uint32_t *p, uint32_t i) { #if !defined(OF_HAVE_THREADS) return (*p |= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_or_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) __asm__ __volatile__ ( "0:\n\t" "movl %2, %0\n\t" "movl %0, %%eax\n\t" @@ -438,12 +440,10 @@ : "r"(i), "m"(*p) : "eax", "cc" ); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_or_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicOr32Barrier(i, p); #else # error of_atomic_int32_or not implemented! #endif @@ -452,10 +452,12 @@ static OF_INLINE unsigned int of_atomic_int_and(volatile unsigned int *p, unsigned int i) { #if !defined(OF_HAVE_THREADS) return (*p &= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_and_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) if (sizeof(int) == 4) __asm__ __volatile__ ( "0:\n\t" "movl %2, %0\n\t" @@ -485,12 +487,10 @@ # endif else abort(); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_and_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicAnd32Barrier(i, p); #else # error of_atomic_int_and not implemented! #endif @@ -499,10 +499,12 @@ static OF_INLINE uint32_t of_atomic_int32_and(volatile uint32_t *p, uint32_t i) { #if !defined(OF_HAVE_THREADS) return (*p &= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_and_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) __asm__ __volatile__ ( "0:\n\t" "movl %2, %0\n\t" "movl %0, %%eax\n\t" @@ -514,12 +516,10 @@ : "r"(i), "m"(*p) : "eax", "cc" ); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_and_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicAnd32Barrier(i, p); #else # error of_atomic_int32_and not implemented! #endif @@ -528,10 +528,12 @@ static OF_INLINE unsigned int of_atomic_int_xor(volatile unsigned int *p, unsigned int i) { #if !defined(OF_HAVE_THREADS) return (*p ^= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_xor_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) if (sizeof(int) == 4) __asm__ __volatile__ ( "0:\n\t" "movl %2, %0\n\t" @@ -561,12 +563,10 @@ # endif else abort(); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_xor_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicXor32Barrier(i, p); #else # error of_atomic_int_xor not implemented! #endif @@ -575,10 +575,12 @@ static OF_INLINE uint32_t of_atomic_int32_xor(volatile uint32_t *p, uint32_t i) { #if !defined(OF_HAVE_THREADS) return (*p ^= i); +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_xor_and_fetch(p, i); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) __asm__ __volatile__ ( "0:\n\t" "movl %2, %0\n\t" "movl %0, %%eax\n\t" @@ -590,12 +592,10 @@ : "r"(i), "m"(*p) : "eax", "cc" ); return i; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_xor_and_fetch(p, i); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicXor32Barrier(i, p); #else # error of_atomic_int32_xor not implemented! #endif @@ -609,10 +609,12 @@ *p = n; return true; } return false; +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_bool_compare_and_swap(p, o, n); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) int r; __asm__ __volatile__ ( "lock\n\t" @@ -623,12 +625,10 @@ : "r"(n), "m"(*p) : "cc" ); return r; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_bool_compare_and_swap(p, o, n); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicCompareAndSwapIntBarrier(o, n, p); #else # error of_atomic_int_cmpswap not implemented! #endif @@ -642,10 +642,12 @@ *p = n; return true; } return false; +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_bool_compare_and_swap(p, o, n); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) int r; __asm__ __volatile__ ( "lock\n\t" @@ -656,12 +658,10 @@ : "r"(n), "m"(*p) : "cc" ); return r; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_bool_compare_and_swap(p, o, n); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicCompareAndSwap32Barrier(o, n, p); #else # error of_atomic_int32_cmpswap not implemented! #endif @@ -675,10 +675,12 @@ *p = n; return true; } return false; +#elif defined(OF_HAVE_GCC_ATOMIC_OPS) + return __sync_bool_compare_and_swap(p, o, n); #elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM) int r; __asm__ __volatile__ ( "lock\n\t" @@ -689,12 +691,10 @@ : "r"(n), "m"(*p) : "cc" ); return r; -#elif defined(OF_HAVE_GCC_ATOMIC_OPS) - return __sync_bool_compare_and_swap(p, o, n); #elif defined(OF_HAVE_OSATOMIC) return OSAtomicCompareAndSwapPtrBarrier(o, n, p); #else # error of_atomic_ptr_cmpswap not implemented! #endif