Index: configure.ac
==================================================================
--- configure.ac
+++ configure.ac
@@ -478,15 +478,17 @@
 AC_MSG_RESULT($fp_endianess)
 AS_IF([test x"$fp_endianess" = x"unknown"], [
 	AC_MSG_ERROR(
 		[Floating point implementation does not conform to IEEE 754!])])
 
-case "$host" in
+case "$host_cpu" in
 	arm*)
 		AC_MSG_CHECKING(if VFP2 or above is available)
 		AC_TRY_COMPILE([], [
-			__asm__("fstmfdd sp!, {d0-d7}");
+			__asm__ __volatile__ (
+			    "fstmfdd sp!, {d0-d7}"
+			);
 		], [
 			AC_DEFINE(HAVE_VFP2, 1, [Whether we have VFP2 or above])
 			AC_MSG_RESULT(yes)
 		], [
 			AC_MSG_RESULT(no)

Index: src/OFSystemInfo.h
==================================================================
--- src/OFSystemInfo.h
+++ src/OFSystemInfo.h
@@ -195,8 +195,23 @@
  *
  * @return Whether the CPU supports AltiVec
  */
 + (bool)supportsAltiVec;
 #endif
+
+#ifdef OF_MIPS_ASM
+/*!
+ * @brief Returns whether the CPU supports MXU.
+ *
+ * MXU is the SIMD extension of the JZ47XX SoCs.
+ *
+ * @warning This method only checks CPU support and assumes OS support!
+ *
+ * @note This method is only available on MIPS.
+ *
+ * @return Whether the CPU supports MXU
+ */
++ (bool)supportsMXU;
+#endif
 @end
 
 OF_ASSUME_NONNULL_END

Index: src/OFSystemInfo.m
==================================================================
--- src/OFSystemInfo.m
+++ src/OFSystemInfo.m
@@ -44,12 +44,13 @@
 # include <FindDirectory.h>
 #endif
 #ifdef __QNX__
 # include <sys/syspage.h>
 #endif
-#ifdef OF_PPC_ASM
+#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
 # include <setjmp.h>
+# include <signal.h>
 #endif
 
 #if defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
 struct x86_regs {
 	uint32_t eax, ebx, ecx, edx;
@@ -56,13 +57,17 @@
 };
 #endif
 
 static size_t pageSize;
 static size_t numberOfCPUs;
-#ifdef OF_PPC_ASM
-static sig_atomic_t altiVecSupported;
-static sigjmp_buf altiVecJumpBuffer;
+#if defined(OF_PPC_ASM)
+static sig_atomic_t supportsAltiVec = 0;
+#elif defined(OF_MIPS_ASM)
+static sig_atomic_t supportsMXU = 0;
+#endif
+#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
+static sigjmp_buf SIGILLJumpBuffer;
 #endif
 
 #if defined(OF_X86_64_ASM)
 static OF_INLINE struct x86_regs OF_CONST_FUNC
 x86_cpuid(uint32_t eax, uint32_t ecx)
@@ -100,29 +105,40 @@
 
 	return regs;
 }
 #endif
 
-#ifdef OF_PPC_ASM
+#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
 static void
-altiVecSIGILLHandler(int signal)
+SIGILLHandler(int signal)
 {
-	altiVecSupported = 0;
-	siglongjmp(altiVecJumpBuffer, 1);
+	siglongjmp(SIGILLJumpBuffer, 1);
 }
 #endif
 
 @implementation OFSystemInfo
-#ifdef OF_PPC_ASM
+#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
 + (void)load
 {
-	altiVecSupported = 1;
-	if (sigsetjmp(altiVecJumpBuffer, 1) == 0) {
-		signal(SIGILL, altiVecSIGILLHandler);
+	if (sigsetjmp(SIGILLJumpBuffer, 1) == 0) {
+		signal(SIGILL, SIGILLHandler);
+# if defined(OF_PPC_ASM)
 		__asm__ __volatile__ (
 		    "vor	v0, v0, v0"
 		);
+		supportsAltiVec = 1;
+# elif defined(OF_MIPS_ASM)
+		/* This also enables the MXU */
+		__asm__ __volatile__ (
+		    "li	$t0, 1\n\t"
+		    ".word 0x7008042f	/* s32i2m xr16, $t0 */"
+		    :
+		    :
+		    : "$8" /* $t0 */
+		);
+		supportsMXU = 1;
+# endif
 	}
 	signal(SIGILL, SIG_DFL);
 }
 #endif
 
@@ -403,9 +419,16 @@
 #endif
 
 #ifdef OF_PPC_ASM
 + (bool)supportsAltiVec
 {
-	return altiVecSupported;
+	return supportsAltiVec;
+}
+#endif
+
+#ifdef OF_MIPS_ASM
++ (bool)supportsMXU
+{
+	return supportsMXU;
 }
 #endif
 @end

Index: src/macros.h
==================================================================
--- src/macros.h
+++ src/macros.h
@@ -275,10 +275,13 @@
 #  ifdef OF_ARMV7_ASM
 #   define OF_ARMV6_ASM
 #  endif
 # elif defined(__arm64__) || defined(__aarch64__)
 #  define OF_ARM64_ASM
+# elif (defined(_MIPS_SIM) && _MIPS_SIM == _ABIO32) || \
+	(defined(__mips_eabi) && _MIPS_SZPTR == 32)
+#  define OF_MIPS_ASM
 # endif
 #endif
 
 #ifdef OF_APPLE_RUNTIME
 # if defined(__x86_64__) || defined(__i386__) || defined(__ARM64_ARCH_8__) || \