Index: src/OFSystemInfo.h ================================================================== --- src/OFSystemInfo.h +++ src/OFSystemInfo.h @@ -236,60 +236,72 @@ * @return Whether the CPU supports enhanced 3DNow! */ + (bool)supportsEnhanced3DNow; /** - * @brief Returns whether the CPU and OS support SSE. + * @brief Returns whether the CPU supports SSE. + * + * @note This only checks CPU support and assumes OS support! * * @note This method is only available on AMD64 and x86. * - * @return Whether the CPU and OS support SSE + * @return Whether the CPU supports SSE */ + (bool)supportsSSE; /** - * @brief Returns whether the CPU and OS support SSE2. + * @brief Returns whether the CPU supports SSE2. + * + * @note This only checks CPU support and assumes OS support! * * @note This method is only available on AMD64 and x86. * - * @return Whether the CPU and OS support SSE2 + * @return Whether the CPU supports SSE2 */ + (bool)supportsSSE2; /** - * @brief Returns whether the CPU and OS support SSE3. + * @brief Returns whether the CPU supports SSE3. + * + * @note This only checks CPU support and assumes OS support! * * @note This method is only available on AMD64 and x86. * - * @return Whether the CPU and OS support SSE3 + * @return Whether the CPU supports SSE3 */ + (bool)supportsSSE3; /** - * @brief Returns whether the CPU and OS support SSSE3. + * @brief Returns whether the CPU supports SSSE3. + * + * @note This only checks CPU support and assumes OS support! * * @note This method is only available on AMD64 and x86. * - * @return Whether the CPU and OS support SSSE3 + * @return Whether the CPU supports SSSE3 */ + (bool)supportsSSSE3; /** - * @brief Returns whether the CPU and OS support SSE4.1. + * @brief Returns whether the CPU supports SSE4.1. + * + * @note This only checks CPU support and assumes OS support! * * @note This method is only available on AMD64 and x86. * - * @return Whether the CPU and OS support SSE4.1 + * @return Whether the CPU supports SSE4.1 */ + (bool)supportsSSE41; /** - * @brief Returns whether the CPU and OS support SSE4.2. + * @brief Returns whether the CPU supports SSE4.2. + * + * @note This only checks CPU support and assumes OS support! * * @note This method is only available on AMD64 and x86. * - * @return Whether the CPU and OS support SSE4.2 + * @return Whether the CPU supports SSE4.2 */ + (bool)supportsSSE42; /** * @brief Returns whether the CPU and OS support AVX. Index: src/OFSystemInfo.m ================================================================== --- src/OFSystemInfo.m +++ src/OFSystemInfo.m @@ -775,54 +775,48 @@ x86CPUID(0x80000001, 0).edx & (1u << 30)); } + (bool)supportsSSE { - return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 25)) && - x86XCR(0).eax & (1u << 1)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 25)); } + (bool)supportsSSE2 { - return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 26)) && - x86XCR(0).eax & (1u << 1)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 26)); } + (bool)supportsSSE3 { - return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 0)) && - x86XCR(0).eax & (1u << 1)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 0)); } + (bool)supportsSSSE3 { - return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 9)) && - x86XCR(0).eax & (1u << 1)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 9)); } + (bool)supportsSSE41 { - return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 19)) && - x86XCR(0).eax & (1u << 1)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 19)); } + (bool)supportsSSE42 { - return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 20)) && - x86XCR(0).eax & (1u << 1)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 20)); } + (bool)supportsAVX { return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 28)) && - x86XCR(0).eax & (1u << 2)); + (x86XCR(0).eax & 0x6) == 0x6); } + (bool)supportsAVX2 { return ((x86CPUID(0, 0).eax >= 7 && (x86CPUID(7, 0).ebx & (1u << 5))) && - x86XCR(0).eax & (1u << 2)); + (x86XCR(0).eax & 0x6) == 0x6); } + (bool)supportsAESNI { return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 25)); @@ -844,95 +838,95 @@ } + (bool)supportsAVX512Foundation { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 16)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512ConflictDetectionInstructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 28)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512ExponentialAndReciprocalInstructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 27)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512PrefetchInstructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 26)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512VectorLengthExtensions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 31)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512DoublewordAndQuadwordInstructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 17)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512ByteAndWordInstructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 30)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512IntegerFusedMultiplyAdd { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 21)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512VectorByteManipulationInstructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 1)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512VectorPopulationCountInstruction { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 14)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512VectorNeuralNetworkInstructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 11)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512VectorByteManipulationInstructions2 { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 6)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512BitAlgorithms { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 12)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512Float16Instructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).edx & (1u << 23)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } + (bool)supportsAVX512BFloat16Instructions { return ((x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 1).eax & (1u << 5)) && - x86XCR(0).eax & ((1u << 5) | (1u << 6) | (1u << 7))); + (x86XCR(0).eax & 0xE6) == 0xE6); } #endif #if defined(OF_POWERPC) || defined(OF_POWERPC64) + (bool)supportsAltiVec