Index: src/atomic.h
==================================================================
--- src/atomic.h
+++ src/atomic.h
@@ -33,20 +33,20 @@
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p += i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	if (sizeof(int) == 4)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "lock\n\t"
 		    "xaddl	%0, %2\n\t"
 		    "addl	%1, %0"
 		    : "+&r"(i)
 		    : "r"(i), "m"(*p)
 		);
 # ifdef OF_AMD64_ASM
 	else if (sizeof(int) == 8)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "lock\n\t"
 		    "xaddq	%0, %2\n\t"
 		    "addq	%1, %0"
 		    : "+&r"(i)
 		    : "r"(i), "m"(*p)
@@ -76,11 +76,11 @@
 of_atomic_add_32(volatile int32_t *p, int32_t i)
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p += i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "lock\n\t"
 	    "xaddl	%0, %2\n\t"
 	    "addl	%1, %0"
 	    : "+&r"(i)
 	    : "r"(i), "m"(*p)
@@ -100,21 +100,21 @@
 of_atomic_add_ptr(void* volatile *p, intptr_t i)
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*(char* volatile*)p += i);
 #elif defined(OF_X86_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "lock\n\t"
 	    "xaddl	%0, %2\n\t"
 	    "addl	%1, %0"
 	    : "+&r"(i)
 	    : "r"(i), "m"(*p)
 	);
 
 	return (void*)i;
 #elif defined(OF_AMD64_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "lock\n\t"
 	    "xaddq	%0, %2\n\t"
 	    "addq	%1, %0"
 	    : "+&r"(i)
 	    : "r"(i), "m"(*p)
@@ -142,21 +142,21 @@
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p -= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	if (sizeof(int) == 4)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "negl	%0\n\t"
 		    "lock\n\t"
 		    "xaddl	%0, %2\n\t"
 		    "subl	%1, %0"
 		    : "+&r"(i)
 		    : "r"(i), "m"(*p)
 		);
 # ifdef OF_AMD64_ASM
 	else if (sizeof(int) == 8)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "negq	%0\n\t"
 		    "lock\n\t"
 		    "xaddq	%0, %2\n\t"
 		    "subq	%1, %0"
 		    : "+&r"(i)
@@ -187,11 +187,11 @@
 of_atomic_sub_32(volatile int32_t *p, int32_t i)
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p -= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "negl	%0\n\t"
 	    "lock\n\t"
 	    "xaddl	%0, %2\n\t"
 	    "subl	%1, %0"
 	    : "+&r"(i)
@@ -212,11 +212,11 @@
 of_atomic_sub_ptr(void* volatile *p, intptr_t i)
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*(char* volatile*)p -= i);
 #elif defined(OF_X86_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "negl	%0\n\t"
 	    "lock\n\t"
 	    "xaddl	%0, %2\n\t"
 	    "subl	%1, %0"
 	    : "+&r"(i)
@@ -223,11 +223,11 @@
 	    : "r"(i), "m"(*p)
 	);
 
 	return (void*)i;
 #elif defined(OF_AMD64_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "negq	%0\n\t"
 	    "lock\n\t"
 	    "xaddq	%0, %2\n\t"
 	    "subq	%1, %0"
 	    : "+&r"(i)
@@ -258,11 +258,11 @@
 	return ++*p;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	int i;
 
 	if (sizeof(int) == 4)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "xorl	%0, %0\n\t"
 		    "incl	%0\n\t"
 		    "lock\n\t"
 		    "xaddl	%0, %1\n\t"
 		    "incl	%0"
@@ -269,11 +269,11 @@
 		    : "=&r"(i)
 		    : "m"(*p)
 		);
 # ifdef OF_AMD64_ASM
 	else if (sizeof(int) == 8)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "xorq	%0, %0\n\t"
 		    "incq	%0\n\t"
 		    "lock\n\t"
 		    "xaddq	%0, %1\n\t"
 		    "incq	%0"
@@ -307,11 +307,11 @@
 #if !defined(OF_HAVE_THREADS)
 	return ++*p;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	uint32_t i;
 
-	__asm__ (
+	__asm__ __volatile__ (
 	    "xorl	%0, %0\n\t"
 	    "incl	%0\n\t"
 	    "lock\n\t"
 	    "xaddl	%0, %1\n\t"
 	    "incl	%0"
@@ -336,11 +336,11 @@
 	return --*p;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	int i;
 
 	if (sizeof(int) == 4)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "xorl	%0, %0\n\t"
 		    "decl	%0\n\t"
 		    "lock\n\t"
 		    "xaddl	%0, %1\n\t"
 		    "decl	%0"
@@ -347,11 +347,11 @@
 		    : "=&r"(i)
 		    : "m"(*p)
 		);
 # ifdef OF_AMD64_ASM
 	else if (sizeof(int) == 8)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "xorq	%0, %0\n\t"
 		    "decq	%0\n\t"
 		    "lock\n\t"
 		    "xaddq	%0, %1\n\t"
 		    "decq	%0"
@@ -385,11 +385,11 @@
 #if !defined(OF_HAVE_THREADS)
 	return --*p;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	uint32_t i;
 
-	__asm__ (
+	__asm__ __volatile__ (
 	    "xorl	%0, %0\n\t"
 	    "decl	%0\n\t"
 	    "lock\n\t"
 	    "xaddl	%0, %1\n\t"
 	    "decl	%0"
@@ -412,28 +412,28 @@
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p |= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	if (sizeof(int) == 4)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "0:\n\t"
 		    "movl	%2, %0\n\t"
-		    "movl	%2, %%eax\n\t"
+		    "movl	%0, %%eax\n\t"
 		    "orl	%1, %0\n\t"
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
 		    : "eax", "cc"
 		);
 # ifdef OF_AMD64_ASM
-	if (sizeof(int) == 8)
-		__asm__ (
+	else if (sizeof(int) == 8)
+		__asm__ __volatile__ (
 		    "0:\n\t"
 		    "movq	%2, %0\n\t"
-		    "movq	%2, %%rax\n\t"
+		    "movq	%0, %%rax\n\t"
 		    "orq	%1, %0\n\t"
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
@@ -465,14 +465,14 @@
 of_atomic_or_32(volatile uint32_t *p, uint32_t i)
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p |= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "0:\n\t"
 	    "movl	%2, %0\n\t"
-	    "movl	%2, %%eax\n\t"
+	    "movl	%0, %%eax\n\t"
 	    "orl	%1, %0\n\t"
 	    "lock\n\t"
 	    "cmpxchg	%0, %2\n\t"
 	    "jne	0\n\t"
 	    : "=&r"(i)
@@ -495,28 +495,28 @@
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p &= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	if (sizeof(int) == 4)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "0:\n\t"
 		    "movl	%2, %0\n\t"
-		    "movl	%2, %%eax\n\t"
+		    "movl	%0, %%eax\n\t"
 		    "andl	%1, %0\n\t"
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
 		    : "eax", "cc"
 		);
 # ifdef OF_AMD64_ASM
-	if (sizeof(int) == 8)
-		__asm__ (
+	else if (sizeof(int) == 8)
+		__asm__ __volatile__ (
 		    "0:\n\t"
 		    "movq	%2, %0\n\t"
-		    "movq	%2, %%rax\n\t"
+		    "movq	%0, %%rax\n\t"
 		    "andq	%1, %0\n\t"
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
@@ -548,14 +548,14 @@
 of_atomic_and_32(volatile uint32_t *p, uint32_t i)
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p &= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "0:\n\t"
 	    "movl	%2, %0\n\t"
-	    "movl	%2, %%eax\n\t"
+	    "movl	%0, %%eax\n\t"
 	    "andl	%1, %0\n\t"
 	    "lock\n\t"
 	    "cmpxchg	%0, %2\n\t"
 	    "jne	0\n\t"
 	    : "=&r"(i)
@@ -578,28 +578,28 @@
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p ^= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	if (sizeof(int) == 4)
-		__asm__ (
+		__asm__ __volatile__ (
 		    "0:\n\t"
 		    "movl	%2, %0\n\t"
-		    "movl	%2, %%eax\n\t"
+		    "movl	%0, %%eax\n\t"
 		    "xorl	%1, %0\n\t"
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
 		    : "r"(i), "m"(*p)
 		    : "eax", "cc"
 		);
 # ifdef OF_AMD64_ASM
-	if (sizeof(int) == 8)
-		__asm__ (
+	else if (sizeof(int) == 8)
+		__asm__ __volatile__ (
 		    "0:\n\t"
 		    "movq	%2, %0\n\t"
-		    "movq	%2, %%rax\n\t"
+		    "movq	%0, %%rax\n\t"
 		    "xorq	%1, %0\n\t"
 		    "lock\n\t"
 		    "cmpxchg	%0, %2\n\t"
 		    "jne	0\n\t"
 		    : "=&r"(i)
@@ -615,11 +615,11 @@
 	return __sync_xor_and_fetch(p, i);
 #elif defined(OF_HAVE_OSATOMIC)
 	if (sizeof(int) == 4)
 		return OSAtomicXor32Barrier(i, p);
 # ifdef OF_HAVE_OSATOMIC_64
-	else (sizeof(int) == 8)
+	else if (sizeof(int) == 8)
 		return OSAtomicXor64Barrier(i, p);
 # endif
 	else
 		abort();
 #else
@@ -631,14 +631,14 @@
 of_atomic_xor_32(volatile uint32_t *p, uint32_t i)
 {
 #if !defined(OF_HAVE_THREADS)
 	return (*p ^= i);
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
-	__asm__ (
+	__asm__ __volatile__ (
 	    "0:\n\t"
 	    "movl	%2, %0\n\t"
-	    "movl	%2, %%eax\n\t"
+	    "movl	%0, %%eax\n\t"
 	    "xorl	%1, %0\n\t"
 	    "lock\n\t"
 	    "cmpxchgl	%0, %2\n\t"
 	    "jne	0\n\t"
 	    : "=&r"(i)
@@ -667,17 +667,17 @@
 
 	return false;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	int r;
 
-	__asm__ (
+	__asm__ __volatile__ (
 	    "lock\n\t"
 	    "cmpxchg	%2, %3\n\t"
 	    "sete	%b0\n\t"
 	    "movzbl	%b0, %0"
-	    : "=&d"(r)	/* use d instead of r due to gcc bug */
-	    : "a"(o), "r"(n), "m"(*p)
+	    : "=&d"(r), "+a"(o)	/* use d instead of r due to gcc bug */
+	    : "r"(n), "m"(*p)
 	    : "cc"
 	);
 
 	return r;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
@@ -700,17 +700,17 @@
 
 	return false;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	int r;
 
-	__asm__ (
+	__asm__ __volatile__ (
 	    "lock\n\t"
 	    "cmpxchg	%2, %3\n\t"
 	    "sete	%b0\n\t"
 	    "movzbl	%b0, %0"
-	    : "=&d"(r)	/* use d instead of r due to gcc bug */
-	    : "a"(o), "r"(n), "m"(*p)
+	    : "=&d"(r), "+a"(o)	/* use d instead of r due to gcc bug */
+	    : "r"(n), "m"(*p)
 	    : "cc"
 	);
 
 	return r;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)
@@ -733,17 +733,17 @@
 
 	return false;
 #elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
 	int r;
 
-	__asm__ (
+	__asm__ __volatile__ (
 	    "lock\n\t"
 	    "cmpxchg	%2, %3\n\t"
 	    "sete	%b0\n\t"
 	    "movzbl	%b0, %0"
-	    : "=&d"(r)	/* use d instead of r due to gcc bug */
-	    : "a"(o), "r"(n), "m"(*p)
+	    : "=&d"(r), "+a"(o)	/* use d instead of r due to gcc bug */
+	    : "r"(n), "m"(*p)
 	    : "cc"
 	);
 
 	return r;
 #elif defined(OF_HAVE_GCC_ATOMIC_OPS)