Overview
Comment: | OFSystemInfo: Add support for more x86 features |
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Timelines: | family | ancestors | descendants | both | trunk |
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SHA3-256: |
f993c6757bab6a00e5609b26a4cb7921 |
User & Date: | js on 2023-10-24 22:15:04 |
Other Links: | manifest | tags |
Context
2023-10-24
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23:56 | Move AMD64/ELF assembly back to Intel syntax check-in: ec513d0c55 user: js tags: trunk | |
22:15 | OFSystemInfo: Add support for more x86 features check-in: f993c6757b user: js tags: trunk | |
21:12 | Use GetModuleHandle where possible check-in: 84caa26d26 user: js tags: trunk | |
Changes
Modified src/OFSystemInfo.h from [51882fbb8f] to [e5c75b40b1].
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52 53 54 55 56 57 58 59 60 61 62 63 64 65 | @property (class, readonly, nonatomic) bool supportsSSSE3; @property (class, readonly, nonatomic) bool supportsSSE41; @property (class, readonly, nonatomic) bool supportsSSE42; @property (class, readonly, nonatomic) bool supportsAVX; @property (class, readonly, nonatomic) bool supportsAVX2; @property (class, readonly, nonatomic) bool supportsAESNI; @property (class, readonly, nonatomic) bool supportsSHAExtensions; @property (class, readonly, nonatomic) bool supportsAVX512Foundation; @property (class, readonly, nonatomic) bool supportsAVX512ConflictDetectionInstructions; @property (class, readonly, nonatomic) bool supportsAVX512ExponentialAndReciprocalInstructions; @property (class, readonly, nonatomic) bool supportsAVX512PrefetchInstructions; @property (class, readonly, nonatomic) | > | 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 | @property (class, readonly, nonatomic) bool supportsSSSE3; @property (class, readonly, nonatomic) bool supportsSSE41; @property (class, readonly, nonatomic) bool supportsSSE42; @property (class, readonly, nonatomic) bool supportsAVX; @property (class, readonly, nonatomic) bool supportsAVX2; @property (class, readonly, nonatomic) bool supportsAESNI; @property (class, readonly, nonatomic) bool supportsSHAExtensions; @property (class, readonly, nonatomic) bool supportsF16C; @property (class, readonly, nonatomic) bool supportsAVX512Foundation; @property (class, readonly, nonatomic) bool supportsAVX512ConflictDetectionInstructions; @property (class, readonly, nonatomic) bool supportsAVX512ExponentialAndReciprocalInstructions; @property (class, readonly, nonatomic) bool supportsAVX512PrefetchInstructions; @property (class, readonly, nonatomic) |
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75 76 77 78 79 80 81 82 83 84 85 86 87 88 | @property (class, readonly, nonatomic) bool supportsAVX512VectorPopulationCountInstruction; @property (class, readonly, nonatomic) bool supportsAVX512VectorNeuralNetworkInstructions; @property (class, readonly, nonatomic) bool supportsAVX512VectorByteManipulationInstructions2; @property (class, readonly, nonatomic) bool supportsAVX512BitAlgorithms; # endif # if defined(OF_POWERPC) || defined(OF_POWERPC64) || defined(DOXYGEN) @property (class, readonly, nonatomic) bool supportsAltiVec; # endif # if defined(OF_WINDOWS) || defined(DOXYGEN) @property (class, readonly, nonatomic, getter=isWindowsNT) bool windowsNT; # endif | > > | 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 | @property (class, readonly, nonatomic) bool supportsAVX512VectorPopulationCountInstruction; @property (class, readonly, nonatomic) bool supportsAVX512VectorNeuralNetworkInstructions; @property (class, readonly, nonatomic) bool supportsAVX512VectorByteManipulationInstructions2; @property (class, readonly, nonatomic) bool supportsAVX512BitAlgorithms; @property (class, readonly, nonatomic) bool supportsAVX512Float16Instructions; @property (class, readonly, nonatomic) bool supportsAVX512BFloat16Instructions; # endif # if defined(OF_POWERPC) || defined(OF_POWERPC64) || defined(DOXYGEN) @property (class, readonly, nonatomic) bool supportsAltiVec; # endif # if defined(OF_WINDOWS) || defined(DOXYGEN) @property (class, readonly, nonatomic, getter=isWindowsNT) bool windowsNT; # endif |
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335 336 337 338 339 340 341 342 343 344 345 346 347 348 | * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports Intel SHA Extensions */ + (bool)supportsSHAExtensions; /** * @brief Returns whether the CPU supports AVX-512 Foundation. * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports AVX-512 Foundation */ | > > > > > > > > > | 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 | * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports Intel SHA Extensions */ + (bool)supportsSHAExtensions; /** * @brief Returns whether the CPU supports F16C. * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports F16C */ + (bool)supportsF16C; /** * @brief Returns whether the CPU supports AVX-512 Foundation. * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports AVX-512 Foundation */ |
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462 463 464 465 466 467 468 469 470 471 472 473 474 475 | * @brief Returns whether the CPU supports AVX-512 Bit Algorithms. * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports AVX-512 Bit Algorithms */ + (bool)supportsAVX512BitAlgorithms; #endif #if defined(OF_POWERPC) || defined(OF_POWERPC64) || defined(DOXYGEN) /** * @brief Returns whether the CPU and OS support AltiVec. * * @note This method is only available on PowerPC and PowerPC 64. | > > > > > > > > > > > > > > > > > > | 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 | * @brief Returns whether the CPU supports AVX-512 Bit Algorithms. * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports AVX-512 Bit Algorithms */ + (bool)supportsAVX512BitAlgorithms; /** * @brief Returns whether the CPU supports AVX-512 Float16 Instructions. * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports AVX-512 Float16 Instructions */ + (bool)supportsAVX512Float16Instructions; /** * @brief Returns whether the CPU supports AVX-512 BFloat16 Instructions. * * @note This method is only available on AMD64 and x86. * * @return Whether the CPU supports AVX-512 BFloat16 Instructions */ + (bool)supportsAVX512BFloat16Instructions; #endif #if defined(OF_POWERPC) || defined(OF_POWERPC64) || defined(DOXYGEN) /** * @brief Returns whether the CPU and OS support AltiVec. * * @note This method is only available on PowerPC and PowerPC 64. |
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Modified src/OFSystemInfo.m from [3bbb5292e5] to [1b9d36f2fa].
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735 736 737 738 739 740 741 | + (bool)supportsMMX { return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 23)); } + (bool)supports3DNow { | > | > | | 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 | + (bool)supportsMMX { return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 23)); } + (bool)supports3DNow { return (x86CPUID(0x80000000, 0).eax >= 0x80000001 && x86CPUID(0x80000001, 0).edx & (1u << 31)); } + (bool)supportsEnhanced3DNow { return (x86CPUID(0x80000000, 0).eax >= 0x80000001 && x86CPUID(0x80000001, 0).edx & (1u << 30)); } + (bool)supportsSSE { return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 25)); } |
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792 793 794 795 796 797 798 799 800 801 802 803 804 805 | return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 25)); } + (bool)supportsSHAExtensions { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 29)); } + (bool)supportsAVX512Foundation { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 16)); } + (bool)supportsAVX512ConflictDetectionInstructions | > > > > > | 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 | return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 25)); } + (bool)supportsSHAExtensions { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 29)); } + (bool)supportsF16C { return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 29)); } + (bool)supportsAVX512Foundation { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 16)); } + (bool)supportsAVX512ConflictDetectionInstructions |
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857 858 859 860 861 862 863 864 865 866 867 868 869 870 | return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 6)); } + (bool)supportsAVX512BitAlgorithms { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 12)); } #endif #if defined(OF_POWERPC) || defined(OF_POWERPC64) + (bool)supportsAltiVec { # if defined(OF_MACOS) int name[2] = { CTL_HW, HW_VECTORUNIT }, value = 0; | > > > > > > > > > > | 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 | return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 6)); } + (bool)supportsAVX512BitAlgorithms { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 12)); } + (bool)supportsAVX512Float16Instructions { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).edx & (1u << 23)); } + (bool)supportsAVX512BFloat16Instructions { return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 1).eax & (1u << 5)); } #endif #if defined(OF_POWERPC) || defined(OF_POWERPC64) + (bool)supportsAltiVec { # if defined(OF_MACOS) int name[2] = { CTL_HW, HW_VECTORUNIT }, value = 0; |
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Modified tests/OFSystemInfoTests.m from [6046c3157f] to [604e506578].
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120 121 122 123 124 125 126 127 128 129 130 131 132 133 | [OFStdOut writeFormat: @"[OFSystemInfo] Supports AES-NI: %d\n", [OFSystemInfo supportsAESNI]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports SHA extensions: %d\n", [OFSystemInfo supportsSHAExtensions]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 Foundation: %d\n", [OFSystemInfo supportsAVX512Foundation]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 Conflict Detection Instructions: " @"%d\n", | > > > | 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 | [OFStdOut writeFormat: @"[OFSystemInfo] Supports AES-NI: %d\n", [OFSystemInfo supportsAESNI]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports SHA extensions: %d\n", [OFSystemInfo supportsSHAExtensions]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports F16C: %d\n", [OFSystemInfo supportsF16C]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 Foundation: %d\n", [OFSystemInfo supportsAVX512Foundation]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 Conflict Detection Instructions: " @"%d\n", |
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178 179 180 181 182 183 184 185 186 187 188 189 190 191 | @"[OFSystemInfo] Supports AVX-512 Vector Byte Manipulation " @"Instructions 2: %d\n", [OFSystemInfo supportsAVX512VectorByteManipulationInstructions2]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 Bit Algorithms: %d\n", [OFSystemInfo supportsAVX512BitAlgorithms]]; #endif #ifdef OF_POWERPC [OFStdOut writeFormat: @"[OFSystemInfo] Supports AltiVec: %d\n", [OFSystemInfo supportsAltiVec]]; #endif | > > > > > > > > | 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 | @"[OFSystemInfo] Supports AVX-512 Vector Byte Manipulation " @"Instructions 2: %d\n", [OFSystemInfo supportsAVX512VectorByteManipulationInstructions2]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 Bit Algorithms: %d\n", [OFSystemInfo supportsAVX512BitAlgorithms]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 Float16 Instructions: %d\n", [OFSystemInfo supportsAVX512Float16Instructions]]; [OFStdOut writeFormat: @"[OFSystemInfo] Supports AVX-512 BFloat16 Instructions: %d\n", [OFSystemInfo supportsAVX512BFloat16Instructions]]; #endif #ifdef OF_POWERPC [OFStdOut writeFormat: @"[OFSystemInfo] Supports AltiVec: %d\n", [OFSystemInfo supportsAltiVec]]; #endif |
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