ObjFW  Check-in [de7e038127]

Overview
Comment:Remove +[OFSystemInfo supports{AltiVec,MXU}]

They relied on siglongjmp() from the SIGILL handler, which on some
systems might have undesired side effects. They will be reintroduced at
some point and then query the OS for support instead.

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SHA3-256: de7e0381278a3549f305a41989780ce6fbc381e6326e109aef4ad5d4d912834e
User & Date: js on 2015-10-18 09:22:17
Other Links: manifest | tags
Context
2015-10-19
22:15
Add platform.h & make platform defines consistent check-in: 1ba08eebc5 user: js tags: trunk
2015-10-18
09:22
Remove +[OFSystemInfo supports{AltiVec,MXU}] check-in: de7e038127 user: js tags: trunk
2015-10-17
22:50
Add +[OFSystemInfo supportsMXU] check-in: 7399e9b249 user: js tags: trunk
Changes
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Modified src/OFSystemInfo.h from [6fc9fba581] to [b1b706eed5].

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 *
 * @note This method is only available on x86 and x86_64.
 *
 * @return Whether the CPU supports AVX2
 */
+ (bool)supportsAVX2;
#endif

#ifdef OF_PPC_ASM
/*!
 * @brief Returns whether the CPU supports AltiVec.
 *
 * @warning This method only checks CPU support and assumes OS support!
 *
 * @note This method is only available on PowerPC.
 *
 * @return Whether the CPU supports AltiVec
 */
+ (bool)supportsAltiVec;
#endif

#ifdef OF_MIPS_ASM
/*!
 * @brief Returns whether the CPU supports MXU.
 *
 * MXU is the SIMD extension of the JZ47XX SoCs.
 *
 * @warning This method only checks CPU support and assumes OS support!
 *
 * @note This method is only available on MIPS.
 *
 * @return Whether the CPU supports MXU
 */
+ (bool)supportsMXU;
#endif
@end

OF_ASSUME_NONNULL_END








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 *
 * @note This method is only available on x86 and x86_64.
 *
 * @return Whether the CPU supports AVX2
 */
+ (bool)supportsAVX2;
#endif




























@end

OF_ASSUME_NONNULL_END

Modified src/OFSystemInfo.m from [4b19d00e46] to [df1cd50578].

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#endif
#ifdef __HAIKU__
# include <FindDirectory.h>
#endif
#ifdef __QNX__
# include <sys/syspage.h>
#endif
#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
# include <setjmp.h>
# include <signal.h>
#endif

#if defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
struct x86_regs {
	uint32_t eax, ebx, ecx, edx;
};
#endif

static size_t pageSize;
static size_t numberOfCPUs;
#if defined(OF_PPC_ASM)
static sig_atomic_t supportsAltiVec = 0;
#elif defined(OF_MIPS_ASM)
static sig_atomic_t supportsMXU = 0;
#endif
#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
static sigjmp_buf SIGILLJumpBuffer;
#endif

#if defined(OF_X86_64_ASM)
static OF_INLINE struct x86_regs OF_CONST_FUNC
x86_cpuid(uint32_t eax, uint32_t ecx)
{
	struct x86_regs regs;









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#endif
#ifdef __HAIKU__
# include <FindDirectory.h>
#endif
#ifdef __QNX__
# include <sys/syspage.h>
#endif





#if defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
struct x86_regs {
	uint32_t eax, ebx, ecx, edx;
};
#endif

static size_t pageSize;
static size_t numberOfCPUs;









#if defined(OF_X86_64_ASM)
static OF_INLINE struct x86_regs OF_CONST_FUNC
x86_cpuid(uint32_t eax, uint32_t ecx)
{
	struct x86_regs regs;
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	    : "a"(eax), "c"(ecx)
	);

	return regs;
}
#endif

#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
static void
SIGILLHandler(int signal)
{
	siglongjmp(SIGILLJumpBuffer, 1);
}
#endif

@implementation OFSystemInfo
#if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM)
+ (void)load
{
	if (sigsetjmp(SIGILLJumpBuffer, 1) == 0) {
		signal(SIGILL, SIGILLHandler);
# if defined(OF_PPC_ASM)
		__asm__ __volatile__ (
		    "vor	v0, v0, v0"
		);
		supportsAltiVec = 1;
# elif defined(OF_MIPS_ASM)
		/* This also enables the MXU */
		__asm__ __volatile__ (
		    "li	$t0, 1\n\t"
		    ".word 0x7008042f	/* s32i2m xr16, $t0 */"
		    :
		    :
		    : "$8" /* $t0 */
		);
		supportsMXU = 1;
# endif
	}
	signal(SIGILL, SIG_DFL);
}
#endif

+ (void)initialize
{
	if (self != [OFSystemInfo class])
		return;

#if defined(_WIN32)
	SYSTEM_INFO si;








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	    : "a"(eax), "c"(ecx)
	);

	return regs;
}
#endif









@implementation OFSystemInfo


























+ (void)initialize
{
	if (self != [OFSystemInfo class])
		return;

#if defined(_WIN32)
	SYSTEM_INFO si;
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	return (x86_cpuid(1, 0).ecx & (1 << 28));
}

+ (bool)supportsAVX2
{
	return x86_cpuid(0, 0).eax >= 7 && (x86_cpuid(7, 0).ebx & (1 << 5));
}
#endif

#ifdef OF_PPC_ASM
+ (bool)supportsAltiVec
{
	return supportsAltiVec;
}
#endif

#ifdef OF_MIPS_ASM
+ (bool)supportsMXU
{
	return supportsMXU;
}
#endif
@end









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	return (x86_cpuid(1, 0).ecx & (1 << 28));
}

+ (bool)supportsAVX2
{
	return x86_cpuid(0, 0).eax >= 7 && (x86_cpuid(7, 0).ebx & (1 << 5));
}
#endif














@end

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