Overview
Comment: | Add +[OFSystemInfo supportsMXU] |
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Downloads: | Tarball | ZIP archive | SQL archive |
Timelines: | family | ancestors | descendants | both | trunk |
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SHA3-256: |
7399e9b249812832d0acb12413633ecc |
User & Date: | js on 2015-10-17 22:50:52 |
Other Links: | manifest | tags |
Context
2015-10-18
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09:22 | Remove +[OFSystemInfo supports{AltiVec,MXU}] check-in: de7e038127 user: js tags: trunk | |
2015-10-17
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22:50 | Add +[OFSystemInfo supportsMXU] check-in: 7399e9b249 user: js tags: trunk | |
19:47 | configure: Use -integrated-as on Clang/MIPS check-in: 47ddf24d41 user: js tags: trunk | |
Changes
Modified configure.ac from [947e3f1ffd] to [da2e0c30a4].
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476 477 478 479 480 481 482 | fp_endianess="universal" ]) AC_MSG_RESULT($fp_endianess) AS_IF([test x"$fp_endianess" = x"unknown"], [ AC_MSG_ERROR( [Floating point implementation does not conform to IEEE 754!])]) | | > | > | 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 | fp_endianess="universal" ]) AC_MSG_RESULT($fp_endianess) AS_IF([test x"$fp_endianess" = x"unknown"], [ AC_MSG_ERROR( [Floating point implementation does not conform to IEEE 754!])]) case "$host_cpu" in arm*) AC_MSG_CHECKING(if VFP2 or above is available) AC_TRY_COMPILE([], [ __asm__ __volatile__ ( "fstmfdd sp!, {d0-d7}" ); ], [ AC_DEFINE(HAVE_VFP2, 1, [Whether we have VFP2 or above]) AC_MSG_RESULT(yes) ], [ AC_MSG_RESULT(no) ]) ;; |
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Modified src/OFSystemInfo.h from [36a7138c5d] to [6fc9fba581].
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193 194 195 196 197 198 199 200 201 202 | * * @note This method is only available on PowerPC. * * @return Whether the CPU supports AltiVec */ + (bool)supportsAltiVec; #endif @end OF_ASSUME_NONNULL_END | > > > > > > > > > > > > > > > | 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 | * * @note This method is only available on PowerPC. * * @return Whether the CPU supports AltiVec */ + (bool)supportsAltiVec; #endif #ifdef OF_MIPS_ASM /*! * @brief Returns whether the CPU supports MXU. * * MXU is the SIMD extension of the JZ47XX SoCs. * * @warning This method only checks CPU support and assumes OS support! * * @note This method is only available on MIPS. * * @return Whether the CPU supports MXU */ + (bool)supportsMXU; #endif @end OF_ASSUME_NONNULL_END |
Modified src/OFSystemInfo.m from [77d1af34d2] to [4b19d00e46].
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42 43 44 45 46 47 48 | #endif #ifdef __HAIKU__ # include <FindDirectory.h> #endif #ifdef __QNX__ # include <sys/syspage.h> #endif | | > | > > | > > | | 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 | #endif #ifdef __HAIKU__ # include <FindDirectory.h> #endif #ifdef __QNX__ # include <sys/syspage.h> #endif #if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM) # include <setjmp.h> # include <signal.h> #endif #if defined(OF_X86_64_ASM) || defined(OF_X86_ASM) struct x86_regs { uint32_t eax, ebx, ecx, edx; }; #endif static size_t pageSize; static size_t numberOfCPUs; #if defined(OF_PPC_ASM) static sig_atomic_t supportsAltiVec = 0; #elif defined(OF_MIPS_ASM) static sig_atomic_t supportsMXU = 0; #endif #if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM) static sigjmp_buf SIGILLJumpBuffer; #endif #if defined(OF_X86_64_ASM) static OF_INLINE struct x86_regs OF_CONST_FUNC x86_cpuid(uint32_t eax, uint32_t ecx) { struct x86_regs regs; |
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98 99 100 101 102 103 104 | : "a"(eax), "c"(ecx) ); return regs; } #endif | | | < | | < | | > > > > > > > > > > > > > | 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 | : "a"(eax), "c"(ecx) ); return regs; } #endif #if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM) static void SIGILLHandler(int signal) { siglongjmp(SIGILLJumpBuffer, 1); } #endif @implementation OFSystemInfo #if defined(OF_PPC_ASM) || defined(OF_MIPS_ASM) + (void)load { if (sigsetjmp(SIGILLJumpBuffer, 1) == 0) { signal(SIGILL, SIGILLHandler); # if defined(OF_PPC_ASM) __asm__ __volatile__ ( "vor v0, v0, v0" ); supportsAltiVec = 1; # elif defined(OF_MIPS_ASM) /* This also enables the MXU */ __asm__ __volatile__ ( "li $t0, 1\n\t" ".word 0x7008042f /* s32i2m xr16, $t0 */" : : : "$8" /* $t0 */ ); supportsMXU = 1; # endif } signal(SIGILL, SIG_DFL); } #endif + (void)initialize { |
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401 402 403 404 405 406 407 | return x86_cpuid(0, 0).eax >= 7 && (x86_cpuid(7, 0).ebx & (1 << 5)); } #endif #ifdef OF_PPC_ASM + (bool)supportsAltiVec { | > > > | > > > > | 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 | return x86_cpuid(0, 0).eax >= 7 && (x86_cpuid(7, 0).ebx & (1 << 5)); } #endif #ifdef OF_PPC_ASM + (bool)supportsAltiVec { return supportsAltiVec; } #endif #ifdef OF_MIPS_ASM + (bool)supportsMXU { return supportsMXU; } #endif @end |
Modified src/macros.h from [c4da03627b] to [57b5109a4c].
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273 274 275 276 277 278 279 280 281 282 283 284 285 286 | # define OF_ARMV6_ASM # endif # ifdef OF_ARMV7_ASM # define OF_ARMV6_ASM # endif # elif defined(__arm64__) || defined(__aarch64__) # define OF_ARM64_ASM # endif #endif #ifdef OF_APPLE_RUNTIME # if defined(__x86_64__) || defined(__i386__) || defined(__ARM64_ARCH_8__) || \ defined(__arm__) || defined(__ppc__) # define OF_HAVE_FORWARDING_TARGET_FOR_SELECTOR | > > > | 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 | # define OF_ARMV6_ASM # endif # ifdef OF_ARMV7_ASM # define OF_ARMV6_ASM # endif # elif defined(__arm64__) || defined(__aarch64__) # define OF_ARM64_ASM # elif (defined(_MIPS_SIM) && _MIPS_SIM == _ABIO32) || \ (defined(__mips_eabi) && _MIPS_SZPTR == 32) # define OF_MIPS_ASM # endif #endif #ifdef OF_APPLE_RUNTIME # if defined(__x86_64__) || defined(__i386__) || defined(__ARM64_ARCH_8__) || \ defined(__arm__) || defined(__ppc__) # define OF_HAVE_FORWARDING_TARGET_FOR_SELECTOR |
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