| ︙ | | |
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
-
+
-
+
|
#endif
static OF_INLINE int
of_atomic_add_int(volatile int *p, int i)
{
#if !defined(OF_HAVE_THREADS)
return (*p += i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
if (sizeof(int) == 4)
__asm__ __volatile__ (
"lock\n\t"
"xaddl %0, %2\n\t"
"addl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
# ifdef OF_AMD64_ASM
# ifdef OF_X86_64_ASM
else if (sizeof(int) == 8)
__asm__ __volatile__ (
"lock\n\t"
"xaddq %0, %2\n\t"
"addq %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
|
| ︙ | | |
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
|
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
|
-
+
|
}
static OF_INLINE int32_t
of_atomic_add_32(volatile int32_t *p, int32_t i)
{
#if !defined(OF_HAVE_THREADS)
return (*p += i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"lock\n\t"
"xaddl %0, %2\n\t"
"addl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
|
| ︙ | | |
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
|
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
|
-
+
-
-
+
+
-
+
-
-
+
+
|
}
static OF_INLINE void*
of_atomic_add_ptr(void* volatile *p, intptr_t i)
{
#if !defined(OF_HAVE_THREADS)
return (*(char* volatile*)p += i);
#elif defined(OF_X86_ASM)
#elif defined(OF_X86_64_ASM)
__asm__ __volatile__ (
"lock\n\t"
"xaddl %0, %2\n\t"
"addl %1, %0"
"xaddq %0, %2\n\t"
"addq %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
return (void*)i;
#elif defined(OF_AMD64_ASM)
#elif defined(OF_X86_ASM)
__asm__ __volatile__ (
"lock\n\t"
"xaddq %0, %2\n\t"
"addq %1, %0"
"xaddl %0, %2\n\t"
"addl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
return (void*)i;
#elif defined(OF_HAVE_GCC_ATOMIC_OPS)
return __sync_add_and_fetch(p, (void*)i);
|
| ︙ | | |
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
-
+
-
+
|
}
static OF_INLINE int
of_atomic_sub_int(volatile int *p, int i)
{
#if !defined(OF_HAVE_THREADS)
return (*p -= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
if (sizeof(int) == 4)
__asm__ __volatile__ (
"negl %0\n\t"
"lock\n\t"
"xaddl %0, %2\n\t"
"subl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
# ifdef OF_AMD64_ASM
# ifdef OF_X86_64_ASM
else if (sizeof(int) == 8)
__asm__ __volatile__ (
"negq %0\n\t"
"lock\n\t"
"xaddq %0, %2\n\t"
"subq %1, %0"
: "+&r"(i)
|
| ︙ | | |
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
|
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
|
-
+
|
}
static OF_INLINE int32_t
of_atomic_sub_32(volatile int32_t *p, int32_t i)
{
#if !defined(OF_HAVE_THREADS)
return (*p -= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"negl %0\n\t"
"lock\n\t"
"xaddl %0, %2\n\t"
"subl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
|
| ︙ | | |
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
|
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
|
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
-
-
-
-
-
-
-
|
}
static OF_INLINE void*
of_atomic_sub_ptr(void* volatile *p, intptr_t i)
{
#if !defined(OF_HAVE_THREADS)
return (*(char* volatile*)p -= i);
#elif defined(OF_X86_64_ASM)
__asm__ __volatile__ (
"negq %0\n\t"
"lock\n\t"
"xaddq %0, %2\n\t"
"subq %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
return (void*)i;
#elif defined(OF_X86_ASM)
__asm__ __volatile__ (
"negl %0\n\t"
"lock\n\t"
"xaddl %0, %2\n\t"
"subl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
return (void*)i;
#elif defined(OF_AMD64_ASM)
__asm__ __volatile__ (
"negq %0\n\t"
"lock\n\t"
"xaddq %0, %2\n\t"
"subq %1, %0"
: "+&r"(i)
|
| ︙ | | |
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
|
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
|
-
+
-
+
|
}
static OF_INLINE int
of_atomic_inc_int(volatile int *p)
{
#if !defined(OF_HAVE_THREADS)
return ++*p;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
int i;
if (sizeof(int) == 4)
__asm__ __volatile__ (
"xorl %0, %0\n\t"
"incl %0\n\t"
"lock\n\t"
"xaddl %0, %1\n\t"
"incl %0"
: "=&r"(i)
: "m"(*p)
);
# ifdef OF_AMD64_ASM
# ifdef OF_X86_64_ASM
else if (sizeof(int) == 8)
__asm__ __volatile__ (
"xorq %0, %0\n\t"
"incq %0\n\t"
"lock\n\t"
"xaddq %0, %1\n\t"
"incq %0"
|
| ︙ | | |
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
|
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
|
-
+
|
}
static OF_INLINE int32_t
of_atomic_inc_32(volatile int32_t *p)
{
#if !defined(OF_HAVE_THREADS)
return ++*p;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
uint32_t i;
__asm__ __volatile__ (
"xorl %0, %0\n\t"
"incl %0\n\t"
"lock\n\t"
"xaddl %0, %1\n\t"
|
| ︙ | | |
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
|
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
|
-
+
-
+
|
}
static OF_INLINE int
of_atomic_dec_int(volatile int *p)
{
#if !defined(OF_HAVE_THREADS)
return --*p;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
int i;
if (sizeof(int) == 4)
__asm__ __volatile__ (
"xorl %0, %0\n\t"
"decl %0\n\t"
"lock\n\t"
"xaddl %0, %1\n\t"
"decl %0"
: "=&r"(i)
: "m"(*p)
);
# ifdef OF_AMD64_ASM
# ifdef OF_X86_64_ASM
else if (sizeof(int) == 8)
__asm__ __volatile__ (
"xorq %0, %0\n\t"
"decq %0\n\t"
"lock\n\t"
"xaddq %0, %1\n\t"
"decq %0"
|
| ︙ | | |
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
|
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
|
-
+
|
}
static OF_INLINE int32_t
of_atomic_dec_32(volatile int32_t *p)
{
#if !defined(OF_HAVE_THREADS)
return --*p;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
uint32_t i;
__asm__ __volatile__ (
"xorl %0, %0\n\t"
"decl %0\n\t"
"lock\n\t"
"xaddl %0, %1\n\t"
|
| ︙ | | |
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
|
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
|
-
+
-
+
|
}
static OF_INLINE unsigned int
of_atomic_or_int(volatile unsigned int *p, unsigned int i)
{
#if !defined(OF_HAVE_THREADS)
return (*p |= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
if (sizeof(int) == 4)
__asm__ __volatile__ (
"0:\n\t"
"movl %2, %0\n\t"
"movl %0, %%eax\n\t"
"orl %1, %0\n\t"
"lock\n\t"
"cmpxchg %0, %2\n\t"
"jne 0\n\t"
: "=&r"(i)
: "r"(i), "m"(*p)
: "eax", "cc"
);
# ifdef OF_AMD64_ASM
# ifdef OF_X86_64_ASM
else if (sizeof(int) == 8)
__asm__ __volatile__ (
"0:\n\t"
"movq %2, %0\n\t"
"movq %0, %%rax\n\t"
"orq %1, %0\n\t"
"lock\n\t"
|
| ︙ | | |
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
|
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
|
-
+
|
}
static OF_INLINE uint32_t
of_atomic_or_32(volatile uint32_t *p, uint32_t i)
{
#if !defined(OF_HAVE_THREADS)
return (*p |= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"0:\n\t"
"movl %2, %0\n\t"
"movl %0, %%eax\n\t"
"orl %1, %0\n\t"
"lock\n\t"
"cmpxchg %0, %2\n\t"
|
| ︙ | | |
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
|
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
|
-
+
-
+
|
}
static OF_INLINE unsigned int
of_atomic_and_int(volatile unsigned int *p, unsigned int i)
{
#if !defined(OF_HAVE_THREADS)
return (*p &= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
if (sizeof(int) == 4)
__asm__ __volatile__ (
"0:\n\t"
"movl %2, %0\n\t"
"movl %0, %%eax\n\t"
"andl %1, %0\n\t"
"lock\n\t"
"cmpxchg %0, %2\n\t"
"jne 0\n\t"
: "=&r"(i)
: "r"(i), "m"(*p)
: "eax", "cc"
);
# ifdef OF_AMD64_ASM
# ifdef OF_X86_64_ASM
else if (sizeof(int) == 8)
__asm__ __volatile__ (
"0:\n\t"
"movq %2, %0\n\t"
"movq %0, %%rax\n\t"
"andq %1, %0\n\t"
"lock\n\t"
|
| ︙ | | |
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
|
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
|
-
+
|
}
static OF_INLINE uint32_t
of_atomic_and_32(volatile uint32_t *p, uint32_t i)
{
#if !defined(OF_HAVE_THREADS)
return (*p &= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"0:\n\t"
"movl %2, %0\n\t"
"movl %0, %%eax\n\t"
"andl %1, %0\n\t"
"lock\n\t"
"cmpxchg %0, %2\n\t"
|
| ︙ | | |
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
|
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
|
-
+
-
+
|
}
static OF_INLINE unsigned int
of_atomic_xor_int(volatile unsigned int *p, unsigned int i)
{
#if !defined(OF_HAVE_THREADS)
return (*p ^= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
if (sizeof(int) == 4)
__asm__ __volatile__ (
"0:\n\t"
"movl %2, %0\n\t"
"movl %0, %%eax\n\t"
"xorl %1, %0\n\t"
"lock\n\t"
"cmpxchg %0, %2\n\t"
"jne 0\n\t"
: "=&r"(i)
: "r"(i), "m"(*p)
: "eax", "cc"
);
# ifdef OF_AMD64_ASM
# ifdef OF_X86_64_ASM
else if (sizeof(int) == 8)
__asm__ __volatile__ (
"0:\n\t"
"movq %2, %0\n\t"
"movq %0, %%rax\n\t"
"xorq %1, %0\n\t"
"lock\n\t"
|
| ︙ | | |
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
|
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
|
-
+
|
}
static OF_INLINE uint32_t
of_atomic_xor_32(volatile uint32_t *p, uint32_t i)
{
#if !defined(OF_HAVE_THREADS)
return (*p ^= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"0:\n\t"
"movl %2, %0\n\t"
"movl %0, %%eax\n\t"
"xorl %1, %0\n\t"
"lock\n\t"
"cmpxchgl %0, %2\n\t"
|
| ︙ | | |
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
|
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
|
-
+
|
#if !defined(OF_HAVE_THREADS)
if (*p == o) {
*p = n;
return true;
}
return false;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
int r;
__asm__ __volatile__ (
"lock\n\t"
"cmpxchg %2, %3\n\t"
"sete %b0\n\t"
"movzbl %b0, %0"
|
| ︙ | | |
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
|
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
|
-
+
|
#if !defined(OF_HAVE_THREADS)
if (*p == o) {
*p = n;
return true;
}
return false;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
int r;
__asm__ __volatile__ (
"lock\n\t"
"cmpxchg %2, %3\n\t"
"sete %b0\n\t"
"movzbl %b0, %0"
|
| ︙ | | |
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
|
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
|
-
+
|
#if !defined(OF_HAVE_THREADS)
if (*p == o) {
*p = n;
return true;
}
return false;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
int r;
__asm__ __volatile__ (
"lock\n\t"
"cmpxchg %2, %3\n\t"
"sete %b0\n\t"
"movzbl %b0, %0"
|
| ︙ | | |
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
|
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
|
-
+
-
+
-
+
|
#endif
}
static OF_INLINE void
of_memory_barrier(void)
{
#if !defined(OF_HAVE_THREADS)
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"mfence"
);
#elif defined(OF_HAVE_GCC_ATOMIC_OPS)
__sync_synchronize();
#elif defined(OF_HAVE_OSATOMIC)
OSMemoryBarrier();
#else
# error of_memory_barrier not implemented!
#endif
}
static OF_INLINE void
of_memory_read_barrier(void)
{
#if !defined(OF_HAVE_THREADS)
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"lfence"
);
#else
of_memory_barrier();
#endif
}
static OF_INLINE void
of_memory_write_barrier(void)
{
#if !defined(OF_HAVE_THREADS)
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
#elif defined(OF_X86_64_ASM) || defined(OF_X86_ASM)
__asm__ __volatile__ (
"sfence"
);
#else
of_memory_barrier();
#endif
}
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