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static OF_INLINE uint32_t
of_atomic_or_32(volatile uint32_t *p, uint32_t i)
{
#if !defined(OF_THREADS)
	return (*p |= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
	uint32_t r = *p | i;
	__asm__ volatile (
	__asm__ (
	    "0:\n\t"
	    "movl	%2, %0\n\t"
	    "movl	%2, %%eax\n\t"
	    "orl	%1, %0\n\t"
	    "lock\n\t"
	    "orl %0, (%1)"
	    :
	    : "r"(i), "r"(p), "m"(*p)
	    "cmpxchg	%0, %2\n\t"
	    "jne	0\n\t"
	    : "=&r"(i)
	    : "r"(i), "m"(*p)
	    : "eax"
	);

	return r;
	return i;
#elif defined(OF_HAVE_GCC_ATOMIC_OPS)
	return __sync_or_and_fetch(p, i);
#elif defined(OF_HAVE_LIBKERN_OSATOMIC_H)
	return OSAtomicOr32Barrier(i, p);
#endif
}

static OF_INLINE uint32_t
of_atomic_and_32(volatile uint32_t *p, uint32_t i)
{
#if !defined(OF_THREADS)
	return (*p &= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
	uint32_t r = *p & i;
	__asm__ volatile (
	__asm__ (
	    "0:\n\t"
	    "movl	%2, %0\n\t"
	    "movl	%2, %%eax\n\t"
	    "andl	%1, %0\n\t"
	    "lock\n\t"
	    "andl %0, (%1)"
	    :
	    : "r"(i), "r"(p), "m"(*p)
	    "cmpxchg	%0, %2\n\t"
	    "jne	0\n\t"
	    : "=&r"(i)
	    : "r"(i), "m"(*p)
	    : "eax"
	);

	return r;
	return i;
#elif defined(OF_HAVE_GCC_ATOMIC_OPS)
	return __sync_and_and_fetch(p, i);
#elif defined(OF_HAVE_LIBKERN_OSATOMIC_H)
	return OSAtomicAnd32Barrier(i, p);
#endif
}

static OF_INLINE uint32_t
of_atomic_xor_32(volatile uint32_t *p, uint32_t i)
{
#if !defined(OF_THREADS)
	return (*p ^= i);
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
	uint32_t r = *p ^ i;
	__asm__ volatile (
	__asm__ (
	    "0:\n\t"
	    "movl	%2, %0\n\t"
	    "movl	%2, %%eax\n\t"
	    "xorl	%1, %0\n\t"
	    "lock\n\t"
	    "xorl %0, (%1)"
	    :
	    : "r"(i), "r"(p), "m"(*p)
	    "cmpxchgl	%0, %2\n\t"
	    "jne	0\n\t"
	    : "=&r"(i)
	    : "r"(i), "m"(*p)
	    : "eax"
	);

	return r;
	return i;
#elif defined(OF_HAVE_GCC_ATOMIC_OPS)
	return __sync_xor_and_fetch(p, i);
#elif defined(OF_HAVE_LIBKERN_OSATOMIC_H)
	return OSAtomicXor32Barrier(i, p);
#endif
}

static OF_INLINE BOOL
of_atomic_cmpswap_32(volatile int32_t *p, int32_t o, int32_t n)
{
#if !defined(OF_THREADS)
	if (*p == o) {
		*p = n;
		return YES;
	}

	return NO;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
	uint32_t r;

	__asm__ (
	    "lock\n\t"
	    "lock; cmpxchg %2, (%3)\n\t"
	    "cmpxchg	%2, %3\n\t"
	    "lahf\n\t"
	    "andb	$64, %%ah\n\t"
	    "shrb	$6, %%ah\n\t"
	    "movzx	%%ah, %0\n\t"
	    : "=a"(r)
	    : "a"(o), "r"(n), "r"(p), "m"(*p)
	    : "a"(o), "r"(n), "m"(*p)
	);

	return r;
#elif defined(OF_HAVE_GCC_ATOMIC_OPS)
	return __sync_bool_compare_and_swap(p, o, n);
#elif defined(OF_HAVE_LIBKERN_OSATOMIC_H)
	return OSAtomicCompareAndSwap32Barrier(o, n, p);
#endif
}

static OF_INLINE BOOL
of_atomic_cmpswap_ptr(void* volatile *p, void *o, void *n)
{
#if !defined(OF_THREADS)
	if (*p == o) {
		*p = n;
		return YES;
	}

	return NO;
#elif defined(OF_X86_ASM) || defined(OF_AMD64_ASM)
	uint32_t r;

	__asm__ (
	    "lock\n\t"
	    "lock; cmpxchg %2, (%3)\n\t"
	    "cmpxchg	%2, %3\n\t"
	    "lahf\n\t"
	    "andb	$64, %%ah\n\t"
	    "shrb	$6, %%ah\n\t"
	    "movzx	%%ah, %0\n\t"
	    : "=a"(r)
	    : "a"(o), "q"(n), "q"(p), "m"(*p)
	    : "a"(o), "q"(n), "m"(*p)
	);

	return r;
#elif defined(OF_HAVE_GCC_ATOMIC_OPS)
	return __sync_bool_compare_and_swap(p, o, n);
#elif defined(OF_HAVE_LIBKERN_OSATOMIC_H)
	return OSAtomicCompareAndSwapPtrBarrier(o, n, p);
#endif
}