Differences From Artifact [81b1425388]:
- File
src/OFSystemInfo.m
— part of check-in
[e7465cd688]
at
2023-11-10 01:31:40
on branch trunk
— OFSystemInfo: Remove check for SSE support in OS
The check was wrong and would return false on OSes that are SSE-enabled
but not AVX-enabled. (user: js, size: 23296) [annotate] [blame] [check-ins using]
To Artifact [4addcc0e7a]:
- File src/OFSystemInfo.m — part of check-in [1f26898324] at 2023-12-21 15:22:21 on branch trunk — OFSystemInfo: Check if the OS enabled SSE support (user: js, size: 24120) [annotate] [blame] [check-ins using]
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14 15 16 17 18 19 20 21 22 23 24 25 26 27 | */ #define __NO_EXT_QNX #include "config.h" #include <limits.h> /* include any libc header to get the libc defines */ #include "unistd_wrapper.h" #include "platform.h" #ifdef HAVE_SYS_UTSNAME_H # include <sys/utsname.h> | > > | 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 | */ #define __NO_EXT_QNX #include "config.h" #include <limits.h> /* include any libc header to get the libc defines */ #include <setjmp.h> #include <signal.h> #include "unistd_wrapper.h" #include "platform.h" #ifdef HAVE_SYS_UTSNAME_H # include <sys/utsname.h> |
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NSSearchPathEnumerationState, char *);
#endif
#if defined(OF_AMD64) || defined(OF_X86)
struct X86Regs {
uint32_t eax, ebx, ecx, edx;
};
#endif
static size_t pageSize = 4096;
static size_t numberOfCPUs = 1;
static OFString *operatingSystemName = nil;
static OFString *operatingSystemVersion = nil;
| > > > > > > > > > > > > > > > > > > > > > > > > > > | 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 |
NSSearchPathEnumerationState, char *);
#endif
#if defined(OF_AMD64) || defined(OF_X86)
struct X86Regs {
uint32_t eax, ebx, ecx, edx;
};
static bool SSESupport;
static jmp_buf SSETestEnv;
static void
SSETestSIGILLHandler(int signum)
{
longjmp(SSETestEnv, 1);
}
static void
SSETest(void)
{
void (*oldHandler)(int) = signal(SIGILL, SSETestSIGILLHandler);
if (setjmp(SSETestEnv) == 0) {
__asm__ __volatile__ (
"movaps %%xmm0, %%xmm0"
::: "xmm0" /* clang is unhappy if we don't clobber it */
);
SSESupport = true;
} else
SSESupport = false;
signal(SIGILL, oldHandler);
}
#endif
static size_t pageSize = 4096;
static size_t numberOfCPUs = 1;
static OFString *operatingSystemName = nil;
static OFString *operatingSystemVersion = nil;
|
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341 342 343 344 345 346 347 348 349 350 351 352 353 354 |
@implementation OFSystemInfo
+ (void)initialize
{
long tmp;
if (self != [OFSystemInfo class])
return;
#if defined(OF_WINDOWS)
SYSTEM_INFO si;
GetSystemInfo(&si);
pageSize = si.dwPageSize;
numberOfCPUs = si.dwNumberOfProcessors;
#elif defined(OF_QNX)
| > > > > > > > > > | 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 |
@implementation OFSystemInfo
+ (void)initialize
{
long tmp;
if (self != [OFSystemInfo class])
return;
#if defined(OF_AMD64) || defined(OF_X86)
/*
* Do this as early as possible, as it involves signals.
* Required as cpuid can return SSE support while the OS has not
* enabled it.
*/
SSETest();
#endif
#if defined(OF_WINDOWS)
SYSTEM_INFO si;
GetSystemInfo(&si);
pageSize = si.dwPageSize;
numberOfCPUs = si.dwNumberOfProcessors;
#elif defined(OF_QNX)
|
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{
return (x86CPUID(0x80000000, 0).eax >= 0x80000001 &&
x86CPUID(0x80000001, 0).edx & (1u << 30));
}
+ (bool)supportsSSE
{
| > | > | > | > | > | > | | 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 |
{
return (x86CPUID(0x80000000, 0).eax >= 0x80000001 &&
x86CPUID(0x80000001, 0).edx & (1u << 30));
}
+ (bool)supportsSSE
{
return SSESupport &&
(x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 25));
}
+ (bool)supportsSSE2
{
return SSESupport &&
(x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 26));
}
+ (bool)supportsSSE3
{
return SSESupport &&
(x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 0));
}
+ (bool)supportsSSSE3
{
return SSESupport &&
(x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 9));
}
+ (bool)supportsSSE41
{
return SSESupport &&
(x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 19));
}
+ (bool)supportsSSE42
{
return SSESupport &&
(x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 20));
}
+ (bool)supportsAVX
{
return ((x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 28)) &&
(x86XCR(0).eax & 0x6) == 0x6);
}
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