Differences From Artifact [61a2fa833b]:
- File src/atomic_x86.h — part of check-in [c7f0229795] at 2020-01-02 01:51:34 on branch trunk — Update copyright (user: js, size: 9001) [annotate] [blame] [check-ins using] [more...]
To Artifact [7fb17d08ce]:
- File
src/atomic_x86.h
— part of check-in
[c859e2230c]
at
2020-12-12 22:31:19
on branch trunk
— Remove OF_*_ASM defines
Duplicating defines for every CPU architecture is not very useful. (user: js, size: 8957) [annotate] [blame] [check-ins using] [more...]
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24 25 26 27 28 29 30 | __asm__ __volatile__ ( "lock\n\t" "xaddl %0, %2\n\t" "addl %1, %0" : "+&r"(i) : "r"(i), "m"(*p) ); | | | 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 | __asm__ __volatile__ ( "lock\n\t" "xaddl %0, %2\n\t" "addl %1, %0" : "+&r"(i) : "r"(i), "m"(*p) ); #ifdef OF_X86_64 else if (sizeof(int) == 8) __asm__ __volatile__ ( "lock\n\t" "xaddq %0, %2\n\t" "addq %1, %0" : "+&r"(i) : "r"(i), "m"(*p) |
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57 58 59 60 61 62 63 |
return i;
}
static OF_INLINE void *_Nullable
of_atomic_ptr_add(void *volatile _Nullable *_Nonnull p, intptr_t i)
{
| | | | 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 |
return i;
}
static OF_INLINE void *_Nullable
of_atomic_ptr_add(void *volatile _Nullable *_Nonnull p, intptr_t i)
{
#if defined(OF_X86_64)
__asm__ __volatile__ (
"lock\n\t"
"xaddq %0, %2\n\t"
"addq %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
return (void *)i;
#elif defined(OF_X86)
__asm__ __volatile__ (
"lock\n\t"
"xaddl %0, %2\n\t"
"addl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
|
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92 93 94 95 96 97 98 | "negl %0\n\t" "lock\n\t" "xaddl %0, %2\n\t" "subl %1, %0" : "+&r"(i) : "r"(i), "m"(*p) ); | | | 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 | "negl %0\n\t" "lock\n\t" "xaddl %0, %2\n\t" "subl %1, %0" : "+&r"(i) : "r"(i), "m"(*p) ); #ifdef OF_X86_64 else if (sizeof(int) == 8) __asm__ __volatile__ ( "negq %0\n\t" "lock\n\t" "xaddq %0, %2\n\t" "subq %1, %0" : "+&r"(i) |
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127 128 129 130 131 132 133 |
return i;
}
static OF_INLINE void *_Nullable
of_atomic_ptr_sub(void *volatile _Nullable *_Nonnull p, intptr_t i)
{
| | | | 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 |
return i;
}
static OF_INLINE void *_Nullable
of_atomic_ptr_sub(void *volatile _Nullable *_Nonnull p, intptr_t i)
{
#if defined(OF_X86_64)
__asm__ __volatile__ (
"negq %0\n\t"
"lock\n\t"
"xaddq %0, %2\n\t"
"subq %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
);
return (void *)i;
#elif defined(OF_X86)
__asm__ __volatile__ (
"negl %0\n\t"
"lock\n\t"
"xaddl %0, %2\n\t"
"subl %1, %0"
: "+&r"(i)
: "r"(i), "m"(*p)
|
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167 168 169 170 171 172 173 | "incl %0\n\t" "lock\n\t" "xaddl %0, %1\n\t" "incl %0" : "=&r"(i) : "m"(*p) ); | | | 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 | "incl %0\n\t" "lock\n\t" "xaddl %0, %1\n\t" "incl %0" : "=&r"(i) : "m"(*p) ); #ifdef OF_X86_64 else if (sizeof(int) == 8) __asm__ __volatile__ ( "xorq %0, %0\n\t" "incq %0\n\t" "lock\n\t" "xaddq %0, %1\n\t" "incq %0" |
| ︙ | ︙ | |||
218 219 220 221 222 223 224 | "decl %0\n\t" "lock\n\t" "xaddl %0, %1\n\t" "decl %0" : "=&r"(i) : "m"(*p) ); | | | 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 | "decl %0\n\t" "lock\n\t" "xaddl %0, %1\n\t" "decl %0" : "=&r"(i) : "m"(*p) ); #ifdef OF_X86_64 else if (sizeof(int) == 8) __asm__ __volatile__ ( "xorq %0, %0\n\t" "decq %0\n\t" "lock\n\t" "xaddq %0, %1\n\t" "decq %0" |
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270 271 272 273 274 275 276 | "lock\n\t" "cmpxchg %0, %2\n\t" "jne 0b" : "=&r"(i) : "r"(i), "m"(*p) : "eax", "cc" ); | | | 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 | "lock\n\t" "cmpxchg %0, %2\n\t" "jne 0b" : "=&r"(i) : "r"(i), "m"(*p) : "eax", "cc" ); #ifdef OF_X86_64 else if (sizeof(int) == 8) __asm__ __volatile__ ( "0:\n\t" "movq %2, %0\n\t" "movq %0, %%rax\n\t" "orq %1, %0\n\t" "lock\n\t" |
| ︙ | ︙ | |||
326 327 328 329 330 331 332 | "lock\n\t" "cmpxchg %0, %2\n\t" "jne 0b" : "=&r"(i) : "r"(i), "m"(*p) : "eax", "cc" ); | | | 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 | "lock\n\t" "cmpxchg %0, %2\n\t" "jne 0b" : "=&r"(i) : "r"(i), "m"(*p) : "eax", "cc" ); #ifdef OF_X86_64 else if (sizeof(int) == 8) __asm__ __volatile__ ( "0:\n\t" "movq %2, %0\n\t" "movq %0, %%rax\n\t" "andq %1, %0\n\t" "lock\n\t" |
| ︙ | ︙ | |||
382 383 384 385 386 387 388 | "lock\n\t" "cmpxchg %0, %2\n\t" "jne 0b" : "=&r"(i) : "r"(i), "m"(*p) : "eax", "cc" ); | | | 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 | "lock\n\t" "cmpxchg %0, %2\n\t" "jne 0b" : "=&r"(i) : "r"(i), "m"(*p) : "eax", "cc" ); #ifdef OF_X86_64 else if (sizeof(int) == 8) __asm__ __volatile__ ( "0:\n\t" "movq %2, %0\n\t" "movq %0, %%rax\n\t" "xorq %1, %0\n\t" "lock\n\t" |
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