@@ -732,11 +732,11 @@ } #if defined(OF_AMD64) || defined(OF_X86) + (bool)supportsMMX { - return (x86CPUID(1, 0).edx & (1u << 23)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 23)); } + (bool)supports3DNow { return (x86CPUID(0x80000001, 0).edx & (1u << 31)); @@ -747,56 +747,121 @@ return (x86CPUID(0x80000001, 0).edx & (1u << 30)); } + (bool)supportsSSE { - return (x86CPUID(1, 0).edx & (1u << 25)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 25)); } + (bool)supportsSSE2 { - return (x86CPUID(1, 0).edx & (1u << 26)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).edx & (1u << 26)); } + (bool)supportsSSE3 { - return (x86CPUID(1, 0).ecx & (1u << 0)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 0)); } + (bool)supportsSSSE3 { - return (x86CPUID(1, 0).ecx & (1u << 9)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 9)); } + (bool)supportsSSE41 { - return (x86CPUID(1, 0).ecx & (1u << 19)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 19)); } + (bool)supportsSSE42 { - return (x86CPUID(1, 0).ecx & (1u << 20)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 20)); } + (bool)supportsAVX { - return (x86CPUID(1, 0).ecx & (1u << 28)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 28)); } + (bool)supportsAVX2 { - return x86CPUID(0, 0).eax >= 7 && (x86CPUID(7, 0).ebx & (1u << 5)); + return (x86CPUID(0, 0).eax >= 7 && (x86CPUID(7, 0).ebx & (1u << 5))); } + (bool)supportsAESNI { - return (x86CPUID(1, 0).ecx & (1u << 25)); + return (x86CPUID(0, 0).eax >= 1 && x86CPUID(1, 0).ecx & (1u << 25)); } + (bool)supportsSHAExtensions { - return (x86CPUID(7, 0).ebx & (1u << 29)); + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 29)); +} + ++ (bool)supportsAVX512Foundation +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 16)); +} + ++ (bool)supportsAVX512ConflictDetectionInstructions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 28)); +} + ++ (bool)supportsAVX512ExponentialAndReciprocalInstructions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 27)); +} + ++ (bool)supportsAVX512PrefetchInstructions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 26)); +} + ++ (bool)supportsAVX512VectorLengthExtensions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 31)); +} + ++ (bool)supportsAVX512DoublewordAndQuadwordInstructions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 17)); +} + ++ (bool)supportsAVX512ByteAndWordInstructions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 30)); +} + ++ (bool)supportsAVX512IntegerFusedMultiplyAdd +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ebx & (1u << 21)); +} + ++ (bool)supportsAVX512VectorByteManipulationInstructions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 1)); +} + ++ (bool)supportsAVX512VectorPopulationCountInstruction +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 14)); +} + ++ (bool)supportsAVX512VectorNeuralNetworkInstructions +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 11)); +} + ++ (bool)supportsAVX512VectorByteManipulationInstructions2 +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 6)); +} + ++ (bool)supportsAVX512BitAlgorithms +{ + return (x86CPUID(0, 0).eax >= 7 && x86CPUID(7, 0).ecx & (1u << 12)); } #endif #if defined(OF_POWERPC) || defined(OF_POWERPC64) + (bool)supportsAltiVec